Generally, the whole memory size in a ROMIC, especially, a high density ROMIC is not fully used in most applications. The area of a ROM memory which is not used in an application is referred to herein as a "no-use" area. In general if a process defect or other influence produces a few defective bit storage locations in the ROM chip, even in the no-use area, the chip will be failed in normal testing procedures. This will pull down the effective yield of a ROMIC fab. However, in a real application, a ROMIC with a few defects at storage locations in a no-use area can still be used. It is an object of the present invention to provide a ROM with circuitry for bypassing a no-use area so the no-use area will not be read during testing or during use in an application and so that the ROM can still be used despite the presence of defects at one or more storage locations in the no-use area.